This invention relates to eight-bit ten-bit (8B10B) coding. More particularly, this invention relates to 8B10B coding for high-speed data rates.
Programmable logic device (PLD) technology is well known for its ability to allow a common hardware design (embodied in an integrated circuit) to be programmed to meet the needs of many different applications. To facilitate the use of PLDs in certain applications, intellectual property (IP) blocks are coupled to PLD core circuitry. In one application, an IP block is a block of logic or data that supports a multi-channel communications protocol such as high speed serial interface (HSSI) communications. HSSI communications include industry standards such as, for example, Serial Rapid I/O and PCI-Express. In a multi-channel communications protocol, data transfers to and from the PLD core circuitry and the IP block over multiple channels.
Such HSSI communications use 8B10B coding, which advantageously provides direct current (DC) balance and limited run length. DC balance means that the number of binary “1s” is equal to the number of binary “0s” transmitted along the data path. This ensures that the output voltage at the serial buffers does not deviate too much towards either the source voltage or ground voltage. Limited run length means that the number of consecutive binary “1s” and “0s” transmitted is limited to, for example, five. This facilitates the receiving chip in locking to the incoming data.
Current 8B10B coding technology has the capability of processing transmitted data at speeds of up to 3.125 gigabits per second (Gbps). However, with advances in technology, protocols are being developed that support even higher data rates (e.g., data rates greater than 3.125 Gbps, for example, 6.5 Gbps).
Current 8B10B coding is known to be implemented in soft IP. Architecture that is implemented in soft IP occupies a larger area compared to the architecture being implemented in hard IP.
In view of the foregoing, it would be desirable to provide 8B10B coding in hard IP with the capability of supporting a greater range of data rates (e.g., data rates less than, equal to, and greater than 3.125 Gbps).